1. Field of the Invention
The present invention relates to a memory system that transmits data to and receives data from a host apparatus and a method of controlling the memory system.
2. Description of the Related Art
A semiconductor memory such as a NAND-type flash memory, from and into which some data items of a predetermined size can be read and written, may be incorporated in a memory card that is to be connected to a host apparatus (See, for example, Jpn. Pat. Appln. KOKAI Publication No. 7-122088.). In such a semiconductor memory, the process time in response to an access may vary in accordance with the address of the memory to which the host apparatus accesses. The “process time” in response to an access is the time required to write or read data into or from the semiconductor memory.
In the NAND-type flash memory, data can be erased only in units of blocks. One block includes a plurality of pages, each of which constitutes a write unit. Hence, rewriting only a part of data stored in a block requires writing the new data, which is to replace that part of the data stored in the block, into a new block. Then, part of the old block which is not rewritten is copied into the new block, from the old block that includes the old data (i.e., data to be rewritten). Many copy operation for data items not to be written will greatly increase the overhead in the data-rewriting process.
On the other hand, rewriting all data stored in a block does not need copy of the part of data which is not to be rewritten from the old block into the new block and attains faster access than the rewriting only a part of the data stored in a block.
As mentioned above, the access speed changes in accordance with the address that is accessed, resulting in possible fluctuation of the process time of the memory in response to an access. As a result, the performance of the memory card deteriorates depending on the address that the host apparatus accesses.